The present invention relates to data signal reading devices, and more particularly, to a data signal reading device for reading the data of an infrared remote control signal.
A conventional data signal reading device of this type is constructed as shown in FIG. 1. In the device, an infrared signal transmitted from the signal transmitting section of, for instance, a remote control device is amplified by an amplifier 1 and applied to a leader signal decision circuit 2, which determines whether or not the signal applied thereto is a remote control signal, and to a level decision circuit 4, which performs a level decision in a sampling mode every time a reference timer circuit 3 produces a reference clock pulse. Of the level decision results provided by the level decision circuit 4, the number of H (high) level results are counted by an H level counter 5, and the number of L (low) level results are counted by an L level counter 6. According to the content of the H level counter 5, a data decision circuit 7 decides whether the input data is "1" or "0". The data decision results provided by the data decision circuit 7 are stored by a memory 8. The number of "1" data bits stored in the memory 8 is counted by a data counter 9, and the memory 8 outputs as many control signals as the number of "1" data bits set in the counter 9.
The operation of the device shown in FIG. 1 will be described with reference to the timing chart of FIGS. 2A through 2C. In the infrared signal provided by the signal transmitting section in the remote control device, as shown in FIG. 2A, data bits in the "1" state are represented by H level signals. The transmitted signal indicated in FIG. 2A has been converted to the form in FIG. 2B upon arrival at the input terminal in FIG. 1 due to noise affecting the H level signal portions.
Upon reception of such an input signal, the signal decision circuit 2 decides whether or not the leader signal of the remote control is contained therein. When it has been determined that the leader signal is present, a reference clock pulse having a predetermined period is applied to the level decision circuit 4 from the timer generating circuit 3 and the input signal level is sampled with the clock pulse thus applied. The waveform of the sampling signal is as shown in FIG. 2C.
The H level counter 5 counts the H level decision results provided by the level decision circuit 4, and the L level counter 6 counts the L level decision results provided by the level decision circuit 4. When the content of the L level counter 6 reaches a predetermined value (four in the case illustrated), it is determined that the input signal is at the L level, whereupon the content of the H level counter 5 is applied to the data decision circuit 7. In the circuit 7, it is determined whether the content of the H level counter 5 is larger than a reference value (seven in the case illustrated) or smaller than that value. If the content is smaller (for instance, six), the input data is determined as being a "0", and if it is larger (for instance, eleven) then it is determined as being a "1". The "1" decision results are stored in the memory 8, and the data bits thus stored are counted by the counter 9. When a predetermined number (four, for instance) of "1" data bits have been stored, the counter 9 operates to output the content of the memory 8 as a data read signal.
In the above-described conventional device, the durations of the H level signals, which are the significant components of the input signal, are determined by counting sampled pulses. Therefore, in the case where significant noise is mixed with the input signal, the device may operate erroneously. That is, the conventional device is low in reliability.